Thesis defence /electrical-computer-engineering/ en PhD Defence Notice: Resource Allocation and Task Scheduling for Integrated Sensing and Communications /electrical-computer-engineering/events/phd-defence-notice-resource-allocation-and-task-scheduling <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Resource Allocation and Task Scheduling for Integrated Sensing and Communications</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Fri, 08/15/2025 - 10:09</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Shisheng Hu</p> <p>Date: August 20, 2025</p> <p>Time: 10:00 AM</p> <p>Location: Online - contact the <a href="mailto:s97hu@uwaterloo.ca">candidate</a> for more information.</p> <p>Supervisors: Shen, Sherman</p> </div> </div> </div> </div> </section> Fri, 15 Aug 2025 14:09:38 +0000 Andrea Pinos 4458 at /electrical-computer-engineering PhD Defence Notice: Contrast Agent Design for Molecular Ultrasound Imaging of Aging Clots /electrical-computer-engineering/events/phd-defence-notice-contrast-agent-design-molecular <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Contrast Agent Design for Molecular Ultrasound Imaging of Aging Clots</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Mon, 08/11/2025 - 10:48</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Richard Shangguan</p> <p>Date: August 13, 2025</p> <p>Time: 11:00 AM</p> <p>Location: EIT 3142</p> <p>Supervisors: Yu, Alfred</p> </div> </div> </div> </div> </section><section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Richard Shangguan</p> <p>Date: August 13, 2025</p> <p>Time: 11:00 AM</p> <p>Location: EIT 3142</p> <p>Supervisors: Yu, Alfred</p> </div> </div> </div> </div> </section> Mon, 11 Aug 2025 14:48:23 +0000 Andrea Pinos 4447 at /electrical-computer-engineering PhD Defence Notice: Planning and Replanning Near-Optimal Robot Coverage Paths in Partially Unknown Environments /electrical-computer-engineering/events/phd-defence-notice-planning-and-replanning-near-optimal <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Planning and Replanning Near-Optimal Robot Coverage Paths in Partially Unknown Environments</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Fri, 08/01/2025 - 08:29</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Megnath Ramesh</p> <p>Date: August 5, 2025</p> <p>Time: 1:00 PM</p> <p>Location: Online - contact the <a href="mailto:m5ramesh@uwaterloo.ca">candidate</a> for more information.</p> <p>Supervisors: Dr. Stephen Smith, Dr. Baris Fidan</p> <h3>Abstract:</h3> <p>We study the problem of planning near-optimal coverage paths for a robot operating in an environment such that a sensor or tool attached to the robot covers the environment. We consider environments that contain unknown obstacles that are detected by the robot during the execution of the coverage path. Such obstacles necessitate a replan of the coverage path that safely avoids the new obstacles while still minimizing a cost function (coverage time, length, and/or turns).</p> <p>For an environment with known obstacles, existing coverage planning approaches discourage turns in the path by covering the environment along the least number of coverage lines, i.e., straight-line paths. This is because turns not only slow down the robot but also negatively affect the quality of coverage, e.g., tools like cameras and cleaning attachments commonly have poor performance around turns. However, existing approaches do not guarantee the minimum number of coverage lines. To this end, we propose a minimum-turn coverage planning approach, namely optimal axis-parallel rank partitioning (OARP), that guarantees coverage along the minimum number of axis-parallel (horizontal/vertical) coverage lines. Using simulations in real-world environments, we show that OARP improves upon state-of-the-art approaches in turns and coverage time.</p> <p>When there are unknown obstacles in the environment, recomputing such paths online are computationally expensive. In such cases, the robot may have to wait for a safe path to continue coverage, resulting in robot stoppages that increase coverage time. To enable replanning with minimal stoppage, we extend OARP to introduce an anytime coverage replanning approach. Upon detecting a new obstacle in the environment, we replan an initial coverage path obtained from OARP within a given time budget (e.g., time to reach the new obstacle). Given this budget, the replanning approach also aims to minimize the overall path turns and coverage time. We showcase the replanning framework in experiments using an industrial cleaning robot avoiding unknown obstacles.</p> <p>We then study two problems towards improving upon the above framework. First, we analyse the length of the coverage paths returned by OARP and obtain an approximation guarantee that quantifies the sub-optimality of OARP path lengths. Following this, we propose an approach that improves upon this approximation factor and computes shorter coverage paths in practice than OARP. The second problem is to remove the axis-parallel constraint imposed by OARP on the coverage lines. We propose decomposing the environment into sectors, i.e., possibly overlapping rectangular sub-regions that can each be covered by straight-line paths parallel to the longest sector edge. Using results from submodular set cover (SSC) problems, we propose a greedy approach to compute sectors and provide an approximation guarantee on the number of sectors in the decomposition.</p> </div> </div> </div> </div> </section> Fri, 01 Aug 2025 12:29:33 +0000 Andrea Pinos 4441 at /electrical-computer-engineering PhD Defence Notice: Toward Secure and Scalable Blockchain Systems: From Game-Theoretic Oracle Networks to AI-driven Smart Contract Repair /electrical-computer-engineering/events/phd-defence-notice-toward-secure-and-scalable-blockchain <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Toward Secure and Scalable Blockchain Systems: From Game-Theoretic Oracle Networks to AI-driven Smart Contract Repair</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Fri, 08/01/2025 - 08:18</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Behkish Nassirzadeh</p> <p>Date: August 8, 2025</p> <p>Time: 1:00 PM</p> <p>Location: Online - contact the <a href="mailto:bnassirz@uwaterloo.ca">candidate</a> for more information.</p> <p>Supervisor(s): Dr. Anwar Hasan, Dr. Vijay Ganesh (Adjunct)</p> <h3>Abstract:</h3> <p>The adoption of blockchain technologies in security-critical and high-throughput do- mains remains limited by persistent challenges in scalability, reliability, and automated vulnerability mitigation. This thesis presents a cohesive body of work that addresses two fundamental limitations of modern blockchain systems: the difficulty of ensuring safe, efficient execution in smart contracts and the lack of robust mechanisms for secure data connectivity through decentralized oracle networks (DONs).</p> <p>To address the first challenge, we introduce a suite of tools, GasGauge, GasGuard, and GasGaugeAI, that advance the detection, analysis, and automated repair of gas-related Denial-of-Service (DoS) vulnerabilities in Ethereum smart contracts. GasGauge lever- ages static-dynamic analysis to model safe loop bounds and identify Out-of-Gas (OOG) risks. GasGuard builds on this foundation by integrating a fine-tuned large language model (LLM) to insert guard conditions that prevent unsafe execution automatically. GasGaugeAI extends the pipeline with a novel dual-LLM framework that classifies state-dependent vulnerabilities, generates Foundry-based test cases, synthesizes function-level repairs, and validates fixes iteratively. Across hundreds of real-world contracts, these systems demonstrate the potential of AI-guided repair to drastically reduce manual auditing efforts and prevent exploitable gas exhaustion patterns.</p> <p>Beyond contract-level vulnerabilities, this thesis tackles the broader problem of trustworthy data connectivity in decentralized applications. We propose CountChain, a game-theoretic decentralized oracle network for secure aggregation in counting systems. Built on this foundation, AdChain applies DON principles to online advertising, mitigating discrepancy fraud through incentive-aligned protocols and Prebid.js integration. Our experiments show that CountChain and AdChain offer both scalability and provable security under rational adversaries.</p> <p>We further unify these contributions through a formal analysis of blockchain vulnerabilities at multiple levels, smart contracts, consensus layers, and oracles, highlighting common attack surfaces and mapping mitigation strategies using static analysis, fuzzing, and LLM-based repair. Finally, we explore how emerging AI methods, particularly LLMs and program synthesis tools, offer a scalable path forward for building self-healing blockchain systems.</p> <p>Together, the tools, systems, and theoretical insights presented in this thesis contribute to the vision of blockchain infrastructures that are both secure and scalable by design, bridging the gap between automated repair and game-theoretic connectivity.</p> </div> </div> </div> </div> </section> Fri, 01 Aug 2025 12:18:17 +0000 Andrea Pinos 4440 at /electrical-computer-engineering PhD Defence Notice: Radar Near-Field Sensing for Biomedical Applications /electrical-computer-engineering/events/phd-defence-notice-radar-near-field-sensing-biomedical <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Radar Near-Field Sensing for Biomedical Applications</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Fri, 05/23/2025 - 14:57</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Omid Bagheri</p> <p>Date: May 29, 2025</p> <p>Time: 8:30 AM</p> <p>Location: Online - contact the <a href="mailto:mobagher@uwaterloo.ca">candidate</a> for more information.</p> <p>Supervisor: Shaker, George – Ramahi, Omar</p> </div> </div> </div> </div> </section> Fri, 23 May 2025 18:57:43 +0000 Andrea Pinos 4411 at /electrical-computer-engineering PhD Defence Notice - Hassan Kianmehr /electrical-computer-engineering/events/phd-defence-notice-hassan-kianmehr <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice - Hassan Kianmehr</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Mon, 09/30/2024 - 15:40</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Hassan Kianmehr<br /> Title: Reconfigurable Microwave/Millimeter-Wave Devices Using Liquid Crystal Technology<br /> Date: September 30, 2024<br /> Time: 2:00 PM<br /> Place: EIT 3142<br /> Supervisor(s): Mansour, Raafat<br /><br /><strong>Abstract:</strong><br /> In recent years, microwave liquid crystal (LC) technology has attracted significant attention from researchers due to its tunability and low-loss characteristics, extending up to terahertz frequencies. However, existing state-of-the-art LC-based devices face limitations in fabrication processes, resulting in relatively large sizes compared to other available tunable technologies. This thesis seeks to address this challenge by proposing a fabrication process for chip-scale and miniaturized LC-integrated devices. To achieve this goal, an alignment method is adopted for silicon micromachined devices, along with a comprehensive fabrication process for chip capacitors, reflective loads, and reflective-type phase shifters. Additionally, a tunable waveguide filter is designed and fabricated based on a control mechanism using a static magnetic field.<br /><br /> The design and fabrication of silicon-micromachined variable capacitors are presented, utilizing nematic LC technology: shunt and series capacitors with and without integrated bias lines. The LC material enables electronic control over its dielectric properties, offering versatility across a broad spectrum of RF reconfigurable applications that require analog tuning. Measurement and simulation results for the chip LC shunt variable capacitor reveal a measured quality factor ranging from 44 to 123 at 1 GHz. With a biasing control voltage from 0 V to 40 V, the fabricated micromachined capacitor demonstrates an 18% capacitance shift. The LC-based series capacitor, demonstrated with an integrated bias line, isolates voltage control from RF terminals, serving a pivotal role in devices where series capacitors are essential. With a 21% shift in capacitance and a quality factor of up to 45 at 1 GHz, the capacitor’s performance is evaluated comprehensively through measurement and simulation. LC-integrated series capacitors tailored for applications without isolating bias voltage from RF terminals are demonstrated, yielding a notable 24% shift in capacitance and achieving a quality factor of up to 105 at 1 GHz. The demonstrated series capacitors feature a 10 μm thin layer of LC material, contributing to lower control voltage requirements and faster response times. These devices are manufactured through an in-house multi-layer microfabrication process.<br /><br /> The thesis introduces a tunable waveguide filter that integrates LC material within quartz glass tubes, actuated by a static magnetic field. This innovative filter demonstrates a 7% tuning range with minimal bandwidth variation. Experimental validation for a 7.5 GHz filter with a 2.5% bandwidth confirms the concept’s viability. The quality factor of this filter varies between 108 and 288 in the fabricated sample. Tuning of the filter is first demonstrated using both a pair of rotating magnets; then, a pair of coil magnets is used to eliminate moving parts.<br /><br /> Finally, two monolithically integrated reflective loads and two reflective-type phase shifters are presented, employing LC material as a reconfigurable element. The LC material is confined within a micromachined space, and its dielectric properties are controlled through an applied bias voltage. The tunable reflective loads find applicability in RTPSs. Operating at frequencies of 28 GHz and 62 GHz, the reflective loads exhibit phase variations of 113◦ and 118◦, respectively, as the bias voltage ranges from 0 V to 25 V. The 28 GHz and 62 GHz devices demonstrate reflective insertion losses of 3.9 dB and 4.3 dB, respectively, indicating figures of merit of 29◦/dB and 27.5◦/dB, respectively. Employing tandem hybrids at the operating frequency alongside two identical reflective loads has led to two reflective-type phase shifters at 28 GHz and 62 GHz. While the phase shift remains the same as the corresponding reflective loads, the insertion loss increases due to the use of hybrids. The insertion loss is measured at 5.95 dB and 7 dB for the 28 GHz and 62 GHz samples, respectively. Fabrication of these devices is conducted in-house using a multi-layer microfabrication process. To the best of our knowledge, this marks the first time a fully silicon-made, chip-level LC integrated reflective load and RTPS phase shifter is presented.</p> </div> </div> </div> </div> </section> Mon, 30 Sep 2024 19:40:37 +0000 Andrea Pinos 4091 at /electrical-computer-engineering PhD Defence Notice: From Understanding Learning Difficulties Among Students To Providing High-Quality Automated Feedback /electrical-computer-engineering/events/phd-defence-notice-understanding-learning-difficulties-among <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: From Understanding Learning Difficulties Among Students To Providing High-Quality Automated Feedback</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Thu, 09/12/2024 - 15:25</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Huanyi Chen</p> <p>Date: September 12, 2024</p> <p>Time: 9:00 AM</p> <p>Place: E5 4047</p> <p>Supervisor(s): Ward, Paul</p> <p><strong>Abstract:</strong></p> <p>Students face various difficulties during their learning journeys. However, providing timely feedback often poses a challenge for educators due to availability constraints. Fortunately, automated feedback systems have been introduced, offering invaluable assistance.</p> <p>To equip instructors with a general understanding of students in their teaching activities, we conducted an analysis of students' learning analytics to gain insights. In this study, we applied clustering techniques to behavior data naturally collected within an automated feedback system. We discovered that although students spent a significant amount of time using the system, the learning outcomes were often limited. A predictive model was derived based on these observations.</p> <p>To assist students in their learning, we explored whether offering trivial-penalty time extensions could be beneficial and why students use them. Implementing flexible late policies was straightforward and placed minimal burden on instructors. We analyzed a fourth-year course that utilized flexible late policies and found that time conflicts and underestimation of coursework were the top two reasons for utilizing time extensions. In addition, our findings revealed a correlation between students' abilities and their usage of time extensions. This latter result was re-examined in a replication study and a reproduction study. While the automated feedback system was not initially considered in the main study, in the reproduction study, we found that even with time extensions and automated feedback systems, low/middle-performing students still could not match the performance of high-performing students. This suggests a fundamental issue: feedback from automated feedback systems may not be as effective as anticipated, which plays an essential role in assisting students' learning at scale.</p> <p>Consequently, the critical question arises: how to provide effective feedback from automated feedback systems. We identified two main issues in current automated feedback systems: incorrect components marked as correct and correct components marked as incorrect. To address these issues, we argue that the unit testing philosophy, widely adopted in the software industry, should not be naively applied to automated feedback systems in an educational context. We completely redesigned the procedure and proposed a novel guideline for composing automated assessments. Following this guideline, we developed an automated assessment for an entity-relationship question in a database course. Our evaluation showed that students had significantly improved their understanding of the topic.</p> </div> </div> </div> </div> </section> Thu, 12 Sep 2024 19:25:25 +0000 Andrea Pinos 4074 at /electrical-computer-engineering PhD Defence Notice: Multi-Area Architecture for Real-Time Feedback-Based Optimization of Distribution Grids /electrical-computer-engineering/events/phd-defence-notice-multi-area-architecture-real-time <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Multi-Area Architecture for Real-Time Feedback-Based Optimization of Distribution Grids</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Mon, 08/12/2024 - 10:06</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Ilyas Farhat</p> <p>Title: Multi-Area Architecture for Real-Time Feedback-Based Optimization of Distribution Grids</p> <p>Date: August 12, 2024</p> <p>Time: 9:00 AM</p> <p>Place: REMOTE ATTENDANCE</p> <p>Supervisor(s): Simpson-Porco, John (Adjunct) - Canizares, Claudio<br /><br /><strong>Abstract:</strong><br /> The transition to a more environmentally-friendly power system, predominantly driven by Distributed Energy Resources (DERs) such as smart loads, Electric Vehicles (EVs), and Photovoltaics (PVs) systems, signals a shift towards a new structural paradigm. Significant challenges emerged as more DERs, particularly those interfaced through inverters, are integrated into the grid. These challenges include variability in power supply and reduced rotational inertia, which contribute to more frequent frequency events and grid instabilities globally. Despite these challenges, DERs offer potential solutions by participating in ancillary service provision.<br /><br /> This thesis aims to harness the potential of DERs at the distribution network (DN) as their integration increases. We focus on overcoming coordination challenges between distribution and transmission networks to integrate DN-DERs in frequency support. To achieve this goal, we develop a coordination framework for distribution networks to manage the DERs. Subsequently, we integrate this DN framework with a recently proposed fast frequency control scheme at the transmission network (TN) level.<br /><br /> In the first stage, we develop a hierarchical feedback-based control architecture for DN-DER coordination. This architecture enables DNs to swiftly respond to power set-point requests from the Transmission System Operator (TSO) while adhering to local operational constraints and ensuring data privacy. The scheme minimizes inter-area communication needs by leveraging physically adjacent areas within the DN control hierarchy. Rigorous stability analysis establishes intuitive closed-loop stability conditions, accompanied by detailed tuning recommendations. Case studies on multiple feeders, including IEEE-123 and IEEE-8500, validate the architecture using a custom MATLAB®-based application integrated with OpenDSS©. Results demonstrate scalability and effective coordination of DERs in response to TSO commands while managing local DN disturbances and operational limits.<br /><br /> In the second stage, we integrate the developed DN control framework into a TN fast frequency control scheme by incorporating a simplified linear model of DN dynamics into the TN control design framework. This integrated approach aims to enhance system responsiveness and performance. To validate this approach, we conducted case studies using the IEEE 9-bus TN system, incorporating IEEE-123 DNs structured with the hierarchical control framework developed in stage 1. The TN controller, designed with the integrated DN dynamic model, demonstrated improved performance across various DN feeder configurations and tuning scenarios.<br /><br /> Combining these stages yields a comprehensive solution that enhances overall system stability and performance. By optimally utilizing DN-DERs to respond to TN controller, where it is designed aware of DN-DERs dynamics, the integrated solution resulted in improved response times and reduced oscillations.</p> </div> </div> </div> </div> </section> Mon, 12 Aug 2024 14:06:42 +0000 Andrea Pinos 4063 at /electrical-computer-engineering PhD Defence Notice: Verifying Neural Networks Explanation /electrical-computer-engineering/events/phd-defence-notice-verifying-neural-networks-explanation <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: Verifying Neural Networks Explanation</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Mon, 08/12/2024 - 10:03</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Nham Van Le</p> <p>Title: Verifying Neural Networks Explanation</p> <p>Date: August 14, 2024</p> <p>Time: 2:00 PM</p> <p>Place: REMOTE ATTENDANCE</p> <p>Supervisor(s): Gurfinkel, Arie<br /><br /><strong>Abstract:</strong><br /> Deep neural networks (DNNs) have been applied in solving many complex tasks across multiple domains, many of which have direct effects on our daily lives: generative models are replacing traditional search engines for answering questions, cars are being driven by neural networks, doctors and radiologists are using neural nets to diagnose patients more efficiently, financial systems are run by automated trading bots, etc. Coupled with the ever-increasing of DNNs' complexity, the need for explaining their predictions and verifying their safety is clear.<br /><br /> Generally speaking, verifying a DNN involves checking if it behaves as expected for unseen inputs in a particular region, and explaining a DNN involves interpreting the network's prediction on a given input. Both approaches have their own pros and cons: the output of any input in a verified region is proven to be correct (with respect to a spec), but such regions are minuscule compared to the whole input space, not just because of the performance of the tools, but because of the inherent limits in e-robustness -- the commonly used verification specifications; and while explanation methods can be applied to explain the output given any input, they are post-hoc and hard to judge: does an explanation make sense because the DNN is working close to how a human being process the same input, or because the explanation visualizes the input itself without taking the model in consideration?<br /><br /> Our main insight: we can combine both verification and explanation, resulting in novel verification problems towards a robust explanation for neural networks. However, any verification problem (or specification) can not exist in isolation, but in a symbiosis relationship with the tools solving it. When we propose a new spec, it is expected that existing tools cannot solve it effectively, or may not work at all. Interesting problems push developers to improve the tools, and better tools widen the design space for researchers to come up with even more interesting specs. Thus, in this proposal, we are introducing not just novel specifications, but how to solve them by building better tools.<br /><br /> This thesis presents a series of results and research ideas based on that insight. First, we show that by extending e-robustness with an explanation function (the activation pattern of the DNN), we can verify a bigger region of the input space using existing verification tools. Second, by verifying the explanation functions, we provide a robust way to compare different explanation methods. Finally, even when the combination of existing DNNs' verification specs and explanation functions is friendlier to existing verification tools, we still run into scalability issues as we increase the size of the networks. Thus, in this thesis we also present our results on building a distributed SMT solver, which lies at the heart of many neural network verification tools.</p> </div> </div> </div> </div> </section> Mon, 12 Aug 2024 14:03:32 +0000 Andrea Pinos 4062 at /electrical-computer-engineering PhD Defence Notice: A Novel PLC front-haul for 5G IoT indoor communication using split C-RAN Architecture /electrical-computer-engineering/events/phd-defence-notice-novel-plc-front-haul-5g-iot-indoor <span class="field field--name-title field--type-string field--label-hidden">PhD Defence Notice: A Novel PLC front-haul for 5G IoT indoor communication using split C-RAN Architecture</span> <span class="field field--name-uid field--type-entity-reference field--label-hidden"><span lang="" about="/electrical-computer-engineering/users/aepinos" typeof="schema:Person" property="schema:name" datatype="" xml:lang="">Andrea Pinos</span></span> <span class="field field--name-created field--type-created field--label-hidden">Thu, 08/01/2024 - 14:31</span> <section class="uw-contained-width uw-section-spacing--default uw-section-separator--none uw-column-separator--none layout layout--uw-1-col"><div class="layout__region layout__region--first"> <div class="uw-text-align--left block block-layout-builder block-inline-blockuw-cbl-copy-text"> <div class="uw-copy-text"> <div class="uw-copy-text__wrapper "> <p>Candidate: Mai Ibrahim<br /> Title: A Novel PLC front-haul for 5G IoT indoor communication using split C-RAN Architecture<br /> Date: August 6, 2024<br /> Time: 1:00 PM<br /> Place: REMOTE ATTENDANCE<br /> Supervisor(s): Ho, Pin-Han<br /><br /><strong>Abstract:</strong><br /> The demand for efficient telecommunications in the era of Fifth Generation (5G) and Internet of Things (IoT) necessitates innovative approaches to network architecture and communication technologies. Recently, split Centralized Radio Access Network (C-RAN) architecture, characterized by Central Unit (CU), geographically dispersed Distributed Unit (DU), and indoor Radio Units (RUs), has presented opportunities for optimizing communication links in indoor environments. Yet, the adaptation of this innovative architecture to enable massive indoor IoT applications is still deemed inefficient due to the associated cost of deployment. Accordingly, this research investigates Power-Line Communication (PLC) as a cost-efficient alternative solution for C-RAN front-haul. Specifically, the focus is on exploring the utilization of indoor low-voltage power lines in the context of 5G New Radio (NR) indoor IoT applications.<br /><br /> First, to ensure that standard protocols like Common Public Radio Interface (CPRI) and Enhanced Common Public Radio Interface (eCPRI) can run on PLC, we introduce two novel patented components to the architecture, namely the CPRI-PLC-Gateway (CPG) and Enhanced CPRI-PLC-Gateway (eCPG). These are a plug and play components that come in pairs. They are used to create a virtual PLC front-haul link ensuring transparent transportation of unmodified CPRI or eCPRI frames between DU and RUs, even under challenging PLC channel conditions. As such, they set the foundation for optimizing the PLC front-haul and help resolve various challenges, including PLC time-varying nature and susceptibility to Additive white Gaussian noise (AWGN).<br /><br /> Furthermore, investigations are extended to study the impact of the proposed PLC based split C-RAN system in the context of the Radio access network (RAN). For that, an indoor multi-story service building that houses a large number of air-interfaced IoT devices is considered. To ensure that the reported results apply to real-life applications, we consider a PLC network that encompasses typical indoor low-voltage 3-phase power lines and follows TN-S earthing configuration. Accordingly, it is shown that through the incorporation of the CPG and eCPG components, the implementation of In-band full-duplex (IBFD) communication over the multiple Input - multiple output (MIMO) PLC channel, and the integration of the hybrid circuit-based isolation, the system can support a considerable number of air interfaced IoT devices at standardized rates. It is also shown that the self-interference over the power line segment is mitigated which ensures robust bidirectional communication in the system.<br /><br /> Moreover, a significant aspect of the thesis revolves around conducting a comprehensive performance analysis for the proposed PLC front-haul for IoT indoor communications. Mathematical models, rooted in queuing theory, Markov modeling, and stochastic geometry, are developed to assess the end-to-end delay performance of the indoor front-haul solution. Analytical expressions are derived for various performance metrics, including radio coverage probability, the number of served devices, and system delay. Wireless spatial models, path-loss models, and interference considerations are meticulously analyzed in terms of multiple factors such as the number of wireless IoT devices, radio and PLC bandwidth, and transmission technology, in regard to the delay performance of the proposed system. These models are rigorously validated through extensive simulations, demonstrating compliance with stringent 5G, CPRI, and eCPRI bit error rate (BER) and delay requirements.<br /><br /> Last, as the thesis further aims to examine the optimization challenge of maximizing throughput in a split-RAN system that includes a PLC front-haul link within a multi-story building. The goal is to optimize the number of fulfilled IoT devices while simultaneously satisfying their quality of service (QoS) criteria. The optimization problem is defined as a mixed-integer non-convex problem, which includes several objectives: maximizing the number of satisfied devices, minimizing operating cost, minimizing device transmit power, and minimizing PLC access delay. The thesis further explores the application of an Evolutionary Multi Objective Optimization (EMO) algorithm, specifically Non-dominated Sorting Genetic Algorithm II (NSGA-II), to address the issue of conflicting objectives in communication systems. The method operates by systematically generating successive iterations of solutions using tournament selection, single-point binary and simulated binary crossovers, and polynomial mutation operators. The system outcomes present a Pareto front consisting of non-dominated solutions for the issue defined using multi-objective optimization (MOO) showing a trade-off between the system objectives.</p> </div> </div> </div> </div> </section> Thu, 01 Aug 2024 18:31:33 +0000 Andrea Pinos 4060 at /electrical-computer-engineering